C2S Program

Please Subscribe and Get Daily Updates in Your Inbox!!!

Please Subscribe and Get Daily Update in Your Inbox
Loading

18 January 2022 Current Affairs:The federal government is requesting applications from 100 start-ups, MSMEs, R&D organizations, and academics to train 85,000 engineers.

Highlights:

  • They are required to train in the areas of very-large-scale integration (VLSI) and embedded device design under the “Chip to Start-up (C2S) Program.”
  • Over the course of five years, the C2S program will result in the production of 175 ASICs (application-specific integrated circuits), an IP core library, and working prototypes of 20 systems on chips (SoC).
  • By injecting the culture of SoC/System Level Design at the Bachelors, Masters, and Research levels, it will be a step toward leapfrogging in the Electronics System Design & Manufacturing (ESDM) space.
  • It will also aid in the development of fabless design start-ups.
  • The program also covers every aspect of the electronics value chain, including quality personnel training, research and development, system design, hardware IP design, prototyping, application-oriented R&D, and deployment.
  • C-DAC is the nodal agency for the C2S program’s implementation (Centre for Development of Advanced Computing). 
  • C-DAC is a MeitY-affiliated scientific society. The Chips to Startup (C2S) website is now accepting submissions for this program. 
  • It will be open till the 31st of January 2022. Applications and proposals must be submitted in the required format to the portal. 
  • In the next six years, India will establish up approximately 20 semiconductor design, component production, and display fabrication (fab) facilities under this program.

Proposal Categories

  • Three applications in three categories are invited under the C2S program, based on institution knowledge, technology readiness level (TRL), and design experience:
  • SoCs/systems/ASICs/Reusable IP Core design and development (s)
  • Application-oriented working prototypes of IPs, SoCs, and ASICs are being developed.
  • ASIC/FPGA R&D with a focus on proof of concept.

Leave a Reply

Your email address will not be published.